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ADC-Slide9

The 12-bit ADC block contains a feature which allows automatic oversampling of a channel, this is referred to as Converted Value Addition Mode. In this mode a channel is sampled up to four times and summed. The summed result is stored in the A/D data register. The channels which are to be summed are selected using the Converted Value Addition Mode Select Registers. The Addition Mode Select Registers are bit enabled so, in the example shown channels, 0 and 2 are selected for addition mode.

PTM Published on: 2012-04-12